Existing software-based memory compression technologies such as ZSWAP/ZRAM is today available to compress a fraction of the memory in order to reduce page swap out. Different to such solutions, our low-latency compression block can be used to compress the whole memory and does therefore offer significantly higher potential to expand memory. In addition to existing solutions, we also offer the option to physically extend the memory adress space which further reduces latency to access the expanded memory.
Our solution compress and decompress on a cache line granularity to avoid compression/decompression overhead when handling memory access without clear patterns. The approach support page deduplication which can be handled synergistically by our IP block. Our approach is compatible with ECC and with memory encryption functionality when handled in the memory controller. To get a good understanding of our technology we suggest that you read our Whitepaper.